1. Field of the Invention
The invention relates to a fabrication method of a liquid crystal display (LCD) device, and more particularly, to a fabrication method of an LCD device including a printing method for a gate or data line using pattern having a wider effective line width.
2. Description of the Related Art
Generally, an LCD device includes a thin film transistor (TFT) array substrate having TFTs formed at each intersection of multiple gate lines and data lines, a color filter substrate facing the TFT array substrate and having a color filter layer for displaying a color image, and a liquid crystal filled between the TFT array substrate and the color filter substrate.
The TFT array substrate has a plurality of gate lines are arranged in parallel, and a plurality of data lines are arranged in a perpendicular state to the gate lines. An intersection between the gate lines and the data lines defines a unit pixel region, and TFTs respectively formed at the intersection regions function as switching devices. The TFTs form a matrix arrangement on the TFT array substrate.
The color filter substrate lies opposed to the TFT array substrate and has a color filter layer constituted with sub color filter layers of R (red), G (green), and B (blue) for displaying an image as a color
A common electrode for applying an electric field to a liquid crystal can be further provided at the color filter substrate so as to correspond with a pixel electrode formed on the TFT array substrate.
In order to apply an electric field to the liquid crystal, a data signal must be applied not only to the common electrode but also to the pixel electrode formed on the TFT array substrate. Here, the TFT serves as a switching device of the data signal.
Generally, the TFT includes a gate electrode, a source electrode, a drain electrode, and a channel region between the source and drain electrodes.
A fabrication method of a related art TFT can be explained with reference to FIGS. 1A to 1F.
FIGS. 1A to 1F show a TFT fabrication process using 5-mask process.
FIG. 1A shows a gate electrode material 11 that is formed on a substrate 1. The gate electrode material of a metal can be formed on the substrate by a sputtering method. The metal layer forming the gate line can constitute one electrode of a storage region for maintaining a voltage during the time of the TFT operation, and a gate pad pattern at a gate pad portion.
FIG. 1B shows that, after forming the gate metal layer, a photoresist is deposited on the gate metal layer, and photolithography using a first mask M respectively forms a gate line, one electrode of a storage region, and a gate pad portion pattern 2 on the substrate 1.
FIG. 1C shows a gate insulating layer 3, a semiconductor layer and high concentrated N+ layer that are sequentially formed on the resulting material. Then, photoresist is deposited and photolithography using a second mask (not shown) selectively etches the semiconductor layer and the high concentration N+ impurity layer to thus form an active layer 4 above the channel region. Here, the active layer 4 is formed by stacking an amorphous silicon (a-Si) layer as a semiconductor layer and a high concentration N+ layer.
The insulating layer 3 and the active layer 4 are usually deposited by a plasma enhanced chemical vapor deposition (PECVD) method.
Then, a conductive material is formed on the active layer, and as shown in FIG. 1D, a photolithography process is performed by using a third mask (not shown) to thus selectively etch so that the conductive material can be applied as source/drain electrodes 5 and 6 that are separated from each other at the channel region. The conductive material may be applied as one electrode of a storage capacitor at the storage region, and the conductive material may be applied as a data electrode 8 at the data pad portion.
FIG. 1E shows a passivation layer 9 that is formed on the resulting material, and photolithography using a fourth mask (not shown) selectively etches so that the drain electrode of the channel region, the storage electrode 7 of the storage region, the gate pattern 2 of the gate pad portion, and the data electrode 8 of the data pad portion can be exposed.
FIG. 1F shows a pixel electrode material that is formed on the resulting material. Then, photolithography process using a fifth mask (not shown) forms a pixel electrode 10 for connecting the drain electrode 6 of the channel region and the storage electrode 7 of the storage region, and a gate line 11 (connected to the gate pattern 2 of the gate pad portion) and a data line 12 (connected to the data electrode 8 of the data pad portion) are formed.
In this process, the five masks were consecutively applied to form the LCD device.
However, in the step for forming the gate electrode, the step for forming the active layer, the step for forming the source/drain electrodes, the step for forming the contact hole in the passivation layer, and the step for forming the pixel electrode, the process for forming each pattern involves depositing photoresist by a spin coater and exposing. The spin coater uniformly deposits photoresist on a substrate by dropping a predetermined amount of photoresist on the substrate where a metal layer is deposited, and by rotating the substrate at high speed. The spin coater method has a problem arising from only partial utilization of the photoresist dropped on the substrate being used during the subsequent exposure process, and most of the photoresist is not used. Accordingly, a large amount of photoresist is uselessly discarded, and only a small amount of photoresist is used during the lithography process. Only approximately 10% of the photoresist deposited by a single spin coating application is used in the lithography process, and a small amount of the used photoresist, approximately 10-20%, is used during the actual pattern forming.
Also, an expensive mask is used to perform the photolithography process.